Parallel CRC coder for 10b input words, VHDL model. CRC is calculacted in one clk.
This coder is for polynomial g(x)=x^18+x^5+x^4+1, but it can be easily changed.
Also this design is for 10b data bus, but it can be easily modified to accommodate any bus width.
http://rapidshare.com/users/4Z4U36
You'll need the password to open this folder, please contact me vie email if you need this.
cejkov.aleksandar@gmail.com
Thursday, August 23, 2007
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1 comment:
Hi,
I've built an online tool that can generate parallel CRC for different polynomials and data widths. It's on http://OutputLogic.com
Thanks,
Evgeni
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